WLCSP / Wafer level CSP
  • Specification

    – Wafer size : 200mm ~ 300mm
    – PKG profile : 0.48mm~0.58mm Thick
    – Chip size : 0.8×0.8mm ~ 5x5mm available
    – Marking : Wafer level green laser marking
    – Protection film : 0.25mm Thick
    – Pack/ship options: Tape & Reel for SMT


For the WLCSP, HANA Micron offers wafer test and packaging process(wafer thinning, protection tape coating, wafer singulation and tape & reel. WLCSP refers to the technology of packaging an integrated circuit at wafer level, instead of the traditional process of assembling the package of each individual unit after wafer dicing WLCSP is essentially a true chip scale packaging (CSP) technology, since the resulting package is practically of the same size as the die. The advantages of WLCSP include smaller size, lesser weight, relatively easier assembly process, lower production costs, and improvement in electrical performance.
It is therefore ideal for use in mobile devices like cell phones, laptops, palmtops, and digital cameras.

  • Features

    - Wafer size 200mm/300mm available
    - Chip size from 0.8×0.8mm to 5x5mm available
    - Bump ball size : below 200μm
    - Protection tape : 25μm
    - JEDEC standard compliance
    - MSL : Level 1 @ 260℃
    - HTS : 150℃, 1000hrs
    - TC : -65℃~150℃, 500cycles
    - PCT : 121℃/100%RH, 2atm, 168hrs

  • Applications

    - Wireless RF
    - TDMB
    - Micro Controller
    - Smart phone
    - Tablet PC
    - Note book